Dynamic Function eXchange (DFX) in Vivado Design Suite


Dynamic Function eXchange is the ability to dynamically modify blocks of logic by downloading partial bit files while the remaining logic continues to operate without interruption. Xilinx DFX technology allows designers to change functionality on the fly, eliminating the need to fully reconfigure and re-establish links, dramatically enhancing the flexibility that FPGAs offer; it is a key capability for platform-based design flows, most notably for Alveo accelerator cards. The use of Dynamic Function eXchange can allow designers to move to fewer or smaller devices, reduce power, and improve system upgradability. Make more efficient use of the silicon by only loading in functionality that is needed at any point in time.

Dynamic Function eXchange Software

The Vivado® Design Suite software tools unlock the capability to reconfigure a portion of a Xilinx FPGA while the rest of the device remains operational. The current solution leverages the impressive implementation capabilities of the Vivado Design Suite, reducing the overhead necessary to create reconfigurable designs. Users can implement designs using the Tcl-based non-project flow, and RTL-based designs are supported in project mode within the Vivado IDE, with many underlying flow details automatically managed. Entry points to the design flow include high level languages processed via Vitis and HLS. Vivado 2020.1 introduces the Nested DFX feature, enabling users to subdivide a dynamic region into lower-order dynamic regions, further expanding the flexibility of Xilinx silicon.

Four pieces of intellectual property are available to help designers complete DFX designs more quickly and easily.  The Dynamic Function eXchange Controller is a hardware-based configuration controller that can help manage all aspects of reconfiguration events, from triggering and arbitration to bitstream delivery and error handling.  The Dynamic Function eXchange Decoupler can be used with the DFX Controller or with any customer controller to safely isolate the dynamic region as it is being reconfigured. The Dynamic Function eXchange AXI Shutdown Manager helps users cease activity on AXI interfaces so Reconfigurable Partitions can be safely reconfigured.  The Dynamic Function eXchange Bitstream Monitor allows users to debug and monitor partial bitstreams, ensuring version and target compatibility.

Key Features and Benefits

Powerful Working Environment

  • Tcl-based non-project flow from HDL to bitstream, and RTL project mode support in the Vivado IDE
  • Efficient management of databases for static and reconfigurable modules
  • Black box bitstream support, allowing incomplete modules to be omitted

User is in Control

  • User decides how to manage reconfigurable module variants
  • Keep the static design open in memory while modules are swapped in and out
  • Floorplan determines what resources are reconfigured

Low level details are handled by the software

  • Tools manage Partition interfaces automatically, with no overhead
  • Design Rule Checks (DRCs) validate design structure and configurations
  • Standard timing closure techniques applied
Device Support

Dynamic Function eXchange is included at no additional cost within all Vivado® Design Suite editions.  Automatic inclusion in Vivado WePack Edition began with version 2019.1.

Most 7 series and Zynq®-7000 devices support Dynamic Function eXchange, with the only exceptions being the smallest devices within these families. UltraScale™ support is complete, with all devices supported through bitstream generation in the current Vivado Design Suite version. UltraScale+™ device support covers all devices in production. See the DFX Reconfiguration User Guide (UG909) for the most up-to-date list.

UltraScale represents a new breakthrough in Dynamic Function eXchange technology, enabling reconfiguration of nearly all FPGA resource types, including I/O, Gigabit Transceivers, and clocking networks.  UltraScale+ improved upon this capable family by streamlining bitstream delivery and expanding reconfiguration modes.  Versal support is a tremendous step forward in efficiency and will be supported in the near future.

Professors and researchers associated with universities may receive licenses  for older versions of Vivado software through the Xilinx University Program (XUP).  Learn more about access requirements and procedures for obtaining licenses here.



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